Very Large Scale Integration (VLSI) implementation of the Delayed Error Normalized LMS (DENLMS) adaptive filter using a pipelined architecture is proposed and it can be used for biomedical applications. The proposed pipelined VLSI architecture increases the performance of adaptive filters by lowering the amount of time spent on critical path calculation. When compared to the current Error Normalized Least Mean Square (ENLMS) method for pipelining purposes, the DENLMS technique requires an additional delay element, and because of the delay element, the algorithm functions faster and more effective in low-power applications. The proposed pipelined architecture of the DENLMS filter, on the other hand, improves the efficiency while consuming less power overall. The cell leakage power reduction and total dynamic power reduction obtained by using the DENLMS filter are 31.8% and 33.5%, respectively, although the overall area of the filter has increased by 20.4%.

Keywords: DENMLS technique, Adaptive filter, Dynamic power, Pipelined architecture.

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